Code to Scale
Learning and using directives for parallel platforms; Migrating legacy code to GPUs and co-processors using high-level parallel programming models; Parallelizing irregular algorithms on massively parallel processors; Exploring Repeatability and Reproducibility issues.
Parallel Algorithms, Embedded Computing, GPUs FPGAs DSPs, Quantum Chemistry, Next-Gen Sequencing
Majors Preparation and Interests
ECE, CIS, CBE, BME, Chemistry and Biochemistry – Parallel Algorithms, Computer Architecture, Parallel Programming Models, Embedded Computing, GPUs, FPGAs, DSPs, Molecular Dynamics, Quantum Chemistry, Next-Gen Sequencing
High Performance Computing, Parallel Computing, Parallel Programming Models, Hardware Architectures, Portability, Scalability, Performance, Repeatability and Reproducibility.
Compute nodes pose thousand-way parallelism between parts of application, such as task parallelism, process-level and thread-level parallelism within a process and a core, along with hardware multithreading, instruction-level parallelism and pipelining of instructions. We see that technological advances have been instrumental in all scientific domains, be it astrophysics, medicine, finance and so on. However a major concern is if legacy code can tap into the massive potential of hardware resources; there is a real challenge to extract these parallelism. Moreover these codes are highly science-driven with varying workloads that demand dynamic load balancing and locality-aware scheduling. Modernizing legacy applications consisting of hundreds and thousands of lines of code for current and emerging architectures is a real challenge. This project aims to explore and create prototypes for parallelizing algorithms on heterogeneous platforms consisting of CPUs along with GPUs and Co-processors. Other hardware platforms of interest would be reconfigurable hardware such as FPGAs and specialized accelerators such as DSPs. However one of the primary challenges with the advances has been to understand how scientific applications were ported to hardware platforms using low-level or proprietary language – these are tied too close to the hardware. This project will explore ways to migrate such programs to a higher-level directive based programming model with a goal that in the process, a portable code be maintained. The overachieving goal is to write once and reuse multiple times such that less time is spent on programming and more time is spent on the science itself. This project will expose the students to large supercomputers comprising over 1 Million cores along with latest generation Co-Processors and several hundreds and thousands of GPUs.
Sunita Chandrasekaran, Phd, CISC, firstname.lastname@example.org
Stephen Siegel, Phd, CISC
Rudolf Eigenmann, Phd, Professor, ECE, email@example.com